CHRIST (Deemed to University), Bangalore

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

School of Engineering and Technology






Syllabus for
MTech (VLSI and Embedded Systems)
Academic Year  (2024)

 
        

  

Assesment Pattern

As per University norms

Examination And Assesments

As per University norms

Department Overview:

The department is well established with state of art technology to impart knowledge for future industrial and educational needs. It is furnished with sound laboratories outfitted with hi-tech instruments, internet and computer systems. It has acoustic poof class rooms with audio-visual teaching aids. The total campus is networked by wire and Wi-Fi system. It has well experienced faculties from reputed industries and institutions. The department has been made as paperless office. It has personalized syllabus suited for global industrial and academic needs. It is well integrated by standalone seminar hall and supporting auditorium to conduct seminars, workshops and training.

Mission Statement:

DEPARTMENT VISION To emerge as a centre of academic excellence in the field of Electronics & Communication Engineering to address the dynamic needs of the industry upholding moral values DEPARTMENT MISSION ? Impart in-depth knowledge in Electronics & Communication Engineering to achieve academic excellence. ? Develop an environment of research to meet the demands of evolving technology. ? Inculcate ethical values to promote team work and leadership qualities befitting societal requirements. ? Provide adaptability skills for sustaining in the dynamic environment.

Introduction to Program:

Concept-to-Silicon is the fundamental ideology of this unique M.Tech. Programme designed and delivered by CHRIST (Deemed to be University). Current growth in IC Design (Semiconductors) can be attributed to the advancement in 4G/5G communication, Internet of Things (IoT), AI & ML and lower technology nodes like FINFETs. The advent of these technologies has opened numerous opportunities for the IC Design industry. Due to 4G/5G technology, IoT?s expansion, AI & ML, FINFET based chip designs and Ultra Low Power design needs, IC Design industry would require more people and high quality manpower to churn out new designs with optimized PPA (lesser Power, higher Performance and lesser Area). The increasing growth rates in the Smartphone market, Consumer market, Automotive, Accelerator based server market and IoT could serve as an important source of opportunities and revenue for the IC Design industry. This increases the requirement for quality and skilled IC Design Engineers who are readily deployable to work from day one in the industry. In this programme, students will be lead, from learning communication systems to implementation using the IC Design strategies as per industry standard flows. The Project-based approach is strongly embedded in this MTech. programme that equips every student withindustry ready skills. Students are trained to be independent and qualified in problem-solving skills by end of this programme.

Program Objective:

Programme Outcome/Programme Learning Goals/Programme Learning Outcome:

PO!: Apply the knowledge of mathematics, science, engineering fundamentals, and an engineering specialization to the solution of complex engineering problems.

Programme Specific Outcome:

PSO1: Analyse, design and develop electronic systems to solve real world problems in VLSI & Embedded Systems.

Programme Educational Objective:

PEO1: Graduates will apply the knowledge to analyse, design and develop solutions for real time engineering problems. Graduates will have the competency to pursue higher learning and research. Graduates will assimilate technical skills with professional ethics. Graduates will be passionate to attain professional excellence through life long learning.

MTAC121 - ENGLISH FOR RESEARCH PAPER WRITING (2024 Batch)

Total Teaching Hours for Semester:45
No of Lecture Hours/Week:3
Max Marks:100
Credits:3

Course Objectives/Course Description

 

 

  • To educate students fundamental RF circuit and system design skills. 

  • To introduce students, the basic RF electronics utilized in the industry and how to build up a complex RF system from basis. 

  • To offer students experience on designing and simulating RF circuits in computer.

Learning Outcome

CO1: Understand that how to improve your writing skills and level of readability

CO2: Learn about what to write in each section

CO3: Understand the skills needed when writing a Title

Unit-1
Teaching Hours:9
PLANNING AND PREPARATION
 

Planning and Preparation, Word Order, Breaking up long sentences, Structuring Paragraphs and Sentences, Being Concise and Removing Redundancy, Avoiding Ambiguity and Vagueness.

Unit-2
Teaching Hours:9
CLARIFYING WHO DID WHAT
 

Clarifying Who Did What, Highlighting Your Findings, Hedging and Criticising, Paraphrasing and Plagiarism, Sections of a Paper, Abstracts. Introduction

Unit-3
Teaching Hours:9
REVIEW OF THE LITERATURE
 

Review of the Literature, Methods, Results, Discussion, Conclusions, The Final Check

Unit-4
Teaching Hours:9
KEY SKILLS TO WRITE A TITLE
 

Key skills are needed when writing a Title, key skills are needed when writing an abstract, key skills are needed when writing an Introduction, skills needed when writing a Review of the Literature.

Unit-5
Teaching Hours:9
WRITING SKILLS AND USEFUL PHRASES
 

Skills needed when writing the Methods, skills needed when writing the Results, skills are needed when writing the Discussion, skills are needed when writing the Conclusions.

 

Useful phrases, how to ensure paper is as good as it could possibly be the first- time submission

Text Books And Reference Books:

T1.Goldbort R (2006) Writing for Science, Yale University Press (available on Google Books).

T2.Day R (2006) How to Write and Publish a Scientific Paper, Cambridge University Press

Essential Reading / Recommended Reading

R1. Highman N (1998), Handbook of Writing for the Mathematical Sciences, SIAM. Highman’s book.

R2. Adrian Wallwork, English for Writing Research Papers, Springer New York Dordrecht Heidelberg London, 2011.

Evaluation Pattern

CIA-50 marks

ESE-50 marks

MTMC124 - RESEARCH METHODOLOGY AND IPR (2024 Batch)

Total Teaching Hours for Semester:30
No of Lecture Hours/Week:2
Max Marks:100
Credits:2

Course Objectives/Course Description

 

The objective of this course is to make the students understand the meaning of research and how to formulate the problem statement by undergoing different methodologies used I research. This course also gives an insight about the intellectual property rights which is very essential to any research engineer.  

Learning Outcome

CO1: Understand research problem formulation

CO2: Analyze research related information

CO3: Follow research ethics

CO4: Understand the importance of ideas, concept and creativity

CO5: Explain the concepts of IPR in general and IPR in engineering in particular

Unit-1
Teaching Hours:6
unit 1
 

Meaning of research problem, Sources of research problem, Criteria Characteristics of a good research problem, Errors in selecting a research problem, Scope and objectives of research problem. Approaches of investigation of solutions for research problem, data collection, analysis, interpretation, Necessary instrumentations, Effective literature studies approaches, analysis Plagiarism , Research ethics

Unit-2
Teaching Hours:6
unit 2
 

Effective technical writing, how to write report, Paper Developing a Research Proposal, Format of research proposal, a presentation and assessment by a review committee

Unit-3
Teaching Hours:6
unit 3
 

Nature of Intellectual Property: Patents, Designs, Trade and Copyright. Process of Patenting and Development: technological research, innovation, patenting, development. International Scenario: International cooperation on Intellectual Property. Procedure for grants of patents, Patenting under PCT .

Unit-4
Teaching Hours:6
unit 4
 

Patent Rights: Scope of Patent Rights. Licensing and transfer of technology. Patent information and databases. Geographical Indications.

Unit-5
Teaching Hours:6
unit 5
 

New Developments in IPR: Administration of Patent System. New developments in IPR; IPR of Biological Systems, Computer Software etc. Traditional knowledge Case Studies, IPR and IITs..

Text Books And Reference Books:

·       Stuart Melville and Wayne Goddard, “Research methodology: an introduction for science & engineering students’”

·       Wayne Goddard and Stuart Melville, “Research Methodology: An Introduction”

·       Ranjit Kumar, 2 nd Edition , “Research Methodology: A Step by Step Guide for beginners”

·       Halbert, “Resisting Intellectual Property”, Taylor & Francis Ltd ,2007.

·       

Essential Reading / Recommended Reading

Mayall , “Industrial Design”, McGraw Hill, 1992.

·       Niebel , “Product Design”, McGraw Hill, 1974.

·       Asimov , “Introduction to Design”, Prentice Hall, 1962.

·       Robert P. Merges, Peter S. Menell, Mark A. Lemley, “ Intellectual Property in New Technological Age”, 2016.

·       T. Ramappa, “Intellectual Property Rights Under WTO”, S. Chand, 2008

 

 

Evaluation Pattern

as per university norms

MTVL131 - CMOS INTEGRATED CIRCUITS (2024 Batch)

Total Teaching Hours for Semester:45
No of Lecture Hours/Week:3
Max Marks:100
Credits:3

Course Objectives/Course Description

 

 

  • This course is an introduction to the basic concepts of MOS transistors

  • It provides a platform for transistor level digital circuits design.

  • The information gained can be applied to different logical implementations.

Learning Outcome

CO1: Able to design basic digital circuits at the transistor level.

CO2: Understand the basic principle of circuit design and timing analysis

CO3: Identify the suitable logical styles for the given problems

CO4: Able to understand the concept of memory organization and its design

Unit-1
Teaching Hours:9
INTRODUCTION TO MOS DESIGN
 

NMOS and PMOS Transistors – Threshold Voltage – Body Effect – Second-order Effects – Transient response, Rise time, Fall Time-Pseudo NMOS Logic-Transistor equivalency-NMOS and CMOS Inverters – Inverter Ratio

Unit-2
Teaching Hours:9
COMBINATIONAL MOS LOGIC CIRCUITS
 

CMOS Logic Structures–MOS logic circuits with NMOS loads, Primitive CMOS logic gates – NOR & NAND gate, Complex Logic circuits design – Realizing Boolean expressions using NMOS gates and CMOS gates, AOI and OIA gates, CMOS full adder, CMOS transmission gates, Designing with Transmission gates-Static CMOS Design – Dynamic CMOS Design – Parasitic Estimation – Switching Characteristics.

Unit-3
Teaching Hours:9
SEQUENTIAL MOS LOGIC CIRCUITS
 

Introduction to Sequential Circuit Design and Timing Analysis-Behavior of bistable elements, SR Latch, Clocked latch and flip flop circuits, CMOS D latch, and edge triggered flip-flop-Electro static discharge (ESD) – Latch up and its Prevention

Unit-4
Teaching Hours:9
I/O DYNAMIC LOGIC CIRCUITS
 

Basic principle, Voltage Bootstrapping, Synchronous dynamic pass transistor circuits, Dynamic CMOS transmission gate logic, High performance Dynamic CMOS circuits

Unit-5
Teaching Hours:9
SEMICONDUCTOR MEMORY DESIGN
 

Introduction, Memory organization, types, MOS decoders, Static RAM cell design, DRAM cell design, three-transistor and one transistor dynamic cell Flash memory FRAMS

Text Books And Reference Books:

T1. Jan M. Rabaey, Anantha P. Chandrakasan and Borivoje Nikolić, Digital Integrated Circuits: A Design Perspective, Second Edition, Prentice Hall India, 2003.

T2. Sung-Mo Kang and Yusuf Leblebici, CMOS Digital Integrated Circuits - Analysis and Design, Third Edition, Tata McGraw-Hill, 2003. 

T3. Neil H. E. Weste and David Money Harris, CMOS VLSI Design: A Circuits and Systems Perspective, Fourth Edition, Addison Wesley, 2010.

T4. Ken Martin, “Digital Integrated Circuit Design”, Oxford University Press, 2011.

Essential Reading / Recommended Reading

R1. Ming-BO Lin, “Introduction to VLSI Systems: A Logic, Circuit and System Perspective”, CRC Press, 2011

R2. Jan M. Rabaey, Anantha Chandrakasan, Borivoje Nikolic, “Digital Integrated Circuits – A Design Perspective”, 2nd Edition, PHI.

Evaluation Pattern

CIA-50 marks

ESE-50 marks

MTVL132 - SEMICONDUCTOR DEVICE THEORY AND MODELING (2024 Batch)

Total Teaching Hours for Semester:45
No of Lecture Hours/Week:3
Max Marks:100
Credits:3

Course Objectives/Course Description

 

 

  • To provide students with the necessary basic understanding and knowledge in semiconductors so that they understand various applications in discrete and integrated analogue electronic circuits.

  • To understand the operation principle of Diode, BJT and MOSFET. 

  • To provide the students a basic knowledge as well as hands on experiences on device and circuit level modeling on primitive semiconductor devices such as diode, transistor, MOSFET, and some basic compound semiconductor devices.

Learning Outcome

CO1: After successfully completing the course, the students will able to learn the basic device and circuit level modelling methodology for different semiconductor devices.

Unit-1
Teaching Hours:9
SEMICONDUCTOR FUNDAMENTALS
 

Review of semiconductor fundamentals, Energy band, Carrier transport phenomena, Recombination and generation, surface effects, traps, Poisson’s equation, continuity equation, diffusion equation\drift, current flow equation, finite difference formulation of these equations in 1D and 2D. 

 

Types of Semiconductors: Elemental and compound semiconductors, Narrow & wide energy gap semiconductors, Direct & Indirect semiconductors, Choice of semiconductors for specific applications.

Unit-2
Teaching Hours:9
PN JUNCTION DIODE, SCHOTTKY DIODE & BJT
 

PN Junction, Zener and Schottky diode DC characteristics, Static, Large and Small signal model of diode, Ideal vs Real Diode Mode.  BJT: DC Characteristics, Eber’s Moll Model, Gummel-Poon Model, Frequency limitation, Non Ideal effects.

Unit-3
Teaching Hours:9
MOS TRANSISTOR THEORY
 

FET/MOSFET: Steady state Characteristics-DC transfer characteristics, long channel IV, MOSFET CV characteristics, Channel Length Modulation, Sub threshold conduction, Mobility variation, Velocity saturation threshold voltage modifications, Threshold adjustment by ion implantation, lightly doped drain MOS transistor, Breakdown voltage, Radiations and Hot electron effects. Leakage and current conduction mechanism of MOSFET. Charge Control Model, Charge sharing model, Static, small and large signal model of MOSFET.

Unit-4
Teaching Hours:9
MODERN VLSI DEVICES
 

Introduction to modern VLSI Devices, Polysilicon emitter transistors, Heterojunctions, 2D electron gas, Band alignment, SOI MOSFETs, PDSOI, FDSOI, Source/drain engineering, Brief Introduction to HEMTS, MESFET (Metal semiconductor FET) and MODFET (Modulation doped FET), Single Electron Transistor (SET).

Unit-5
Teaching Hours:9
SPICE MODELING
 

Introduction to SPICE modeling, Growth of fables design industry, SPICE modeling of resistor, Capacitor, Inductor, Semiconductor devices such as Diode, BJT, FET, MOSFET.MOSFET model parameters, Introduction to MOSFET SPICE Level 1, Level 2 and Level 3 models. 

 

Introduction to Device simulators, Tools for simulating device performance, Introduction to Circuit simulators

Text Books And Reference Books:

T1.Donald A. Neamen, “Semiconductor Physics and devices”, 4 McGraw Hill, 2017 th Edition, Tata . 

T2 Taur and Ning, “Fundamental of Modern VLSI Devices”, 2 nd Edition, Cambridge Press, 2016. 

T3 Balbir Kumar, Shail B. Jain, “Electronic Devices and Circuits”, PHI Publication, 2013.

Essential Reading / Recommended Reading

R1.Ben G. Streetman & S. Banerjee, “Solid state electronic devices”, 12 th Edition, Prentice Hall, 2010. 

R2. G. Milnes, “Semiconductor Devices and Integrated Electronics”, Springer, 2012. 3 Jan M.Rabaey” Digital Integrated Circuits: A design perspective”, Pearson, 2016.

Evaluation Pattern

CIA-50 marks

ESE-50 marks

MTVL143E01 - DIGITAL SYSTEM DESIGN USING VERILOG (2024 Batch)

Total Teaching Hours for Semester:45
No of Lecture Hours/Week:3
Max Marks:100
Credits:3

Course Objectives/Course Description

 

 

  • This course is an introduction to the Verilog language. The emphasis is on writing synthesizable code and enough simulation code to write a viable test-bench. 

  • The information gained can be applied to any digital design by using a top-down synthesis design approach.

Learning Outcome

CO1: Implement the Verilog coding for digital designs.

CO2: Identify the differences between behavioral and structural coding styles

CO3: Understand the basic principle of circuit design and analysis

Unit-1
Teaching Hours:9
INTRODUCTION AND METHODOLOGY
 

Digital Systems and Embedded Systems, Boolean Functions and Boolean algebra, Binary Coding, Combinational Components and Circuits, Verification of Combinational Circuits.

Unit-2
Teaching Hours:9
SEQUENTIAL BASICS & MEMORIES
 

Storage elements, Counters, Sequential Data paths and Control, Clocked Synchronous Timing Methodology. Memories: Concepts, Memory Types, Error Detection and Correction

Unit-3
Teaching Hours:9
IMPLEMENTATION FABRICS & PROCESSOR BASICS
 

ICs, PLDs, Packaging and Circuit Boards, Interconnection and Signal Integrity. Processor Basics: Embedded Computer Organization, Instruction and Data, Interfacing with memory

Unit-4
Teaching Hours:9
I/O INTERFACING, ACCELERATORS & DESIGN METHODOLOGY
 

I/O devices, I/O controllers, Parallel Buses, Serial Transmission, I/O software. Accelerators: Concepts, case study, Verification of accelerators. Design Methodology: Design flow, Design optimization, Design for test.

Unit-5
Teaching Hours:9
SIMPLE SINGLE CYCLE AND MULTI CYCLE PROCESSOR DESIGN
 

Introduction of Simple Single Cycle and Multi Cycle Processor Design

Text Books And Reference Books:

T1. Samir Palnitkar, “Verilog HDL”, 2 edition, Pearson Education, 2003

T2. Peter.J.Ashenden, “Digital Design: An Embedded Systems Approach Using Verilog”, Elsevier 2010

Essential Reading / Recommended Reading

R1.Parhami, Behrooz, Computer Arithmetic: Algorithms and Hardware Designs, Oxford University Press, 2009. 

R2. Z. Navabi, Verilog Digital System Design, Second Edition, Tata McGrawHill, 2008. 

R3. R. C. Cofer and B. F. Harding, Rapid System Prototyping with FPGAs: Accelerating the Design Process, Elsevier/Newnes, 2005.

R4. Peter J. Ashenden, “Digital Design: An Embedded Sytems Approach Using VERILOG”, Elsevier, 2010

Evaluation Pattern

CIA-50 marks

ESE-50 marks

MTVL144E01 - EMBEDDED SYSTEM AND SOC DESIGN (2024 Batch)

Total Teaching Hours for Semester:45
No of Lecture Hours/Week:3
Max Marks:100
Credits:3

Course Objectives/Course Description

 

To study the hardware and software used in Embedded Systems.

To understand the system architecture of SoC design

Learning Outcome

CO1: Describe characteristics of embedded systems and its hardware and software.

CO2: Categorize the devices and buses used for embedded networking.

CO3: Demonstrate the programming concepts and embedded programming in C and C++.

CO4: Examine the concepts of real time operating systems, inter-task communication and an exemplary case of MUCOS IIRTOS.

Unit-1
Teaching Hours:9
INTRODUCTION TO EMBEDDED SYSTEMS
 

Definition and Classification – Overview of Processors and hardware units in an embedded system – Software embedded into the system – Exemplary Embedded Systems – Embedded Systems on a Chip (SoC) and the use of VLSI designed circuits.

Unit-2
Teaching Hours:9
DEVICES AND BUSES FOR DEVICES NETWORK
 

I/O Devices - Device I/O Types and Examples – Synchronous - Iso-synchronous and Asynchronous Communications from Serial Devices - Examples of Internal Serial-Communication Devices - UART and HDLC - Parallel Port Devices - Sophisticated interfacing features in Devices/Ports- Timer and Counting Devices - ‘12C’, ‘USB’, ‘CAN’ and advanced I/O Serial high speed buses- ISA, PCI, PCI-X, cPCI and advanced buses.

Unit-3
Teaching Hours:9
PROGRAMMING CONCEPTS AND EMBEDDED PROGRAMMING IN C, C++
 

Programming in assembly language (ALP) vs. High Level Language - C Program Elements, Macros and functions -Use of Pointers - NULL Pointers - Use of Function Calls – Multiple function calls in a Cyclic Order in the Main Function Pointers – Function Queues and Interrupt Service Routines Queues Pointers – Concepts of EMBEDDED PROGRAMMING in C++ - Objected Oriented Programming – Embedded Programming in C++, ‘C’ Program compilers – Cross compiler – Optimization of memory codes.

Unit-4
Teaching Hours:9
SYSTEM ARCHITECTURE
 

Components of the system – Processor architectures – Memory and addressing – system level interconnection – SoC design requirements and specifications – design integration – design complexity – cycle time, die area and cost, ideal and practical scaling, area-time-power tradeoff in processor design, Configurability.

Unit-5
Teaching Hours:9
PROCESSOR SELECTION FOR SOC, MEMORY DESIGN AND INTERCONNECT BUS
 

Overview – soft processors, processor core selection. Basic concepts – instruction set, branches, interrupts and exceptions. Basic elements in instruction handling – Minimizing pipeline delays – reducing the cost of branches – Robust processors – Vector processors, VLIW processors, Superscalar processors.

SoC external memory, SoC internal memory, Scratch pads and cache memory – cache organization and write policies – strategies for line replacement at miss time – split I- and D- caches – multilevel caches – SoC memory systems – board-based memory systems – simple processor/memory interaction. Bus architectures – SoC standard buses – AMBA, AHB.

Text Books And Reference Books:

T1. Rajkamal, Embedded Systems Architecture, Programming and Design, TATA McGraw-Hill, Education 2011

Essential Reading / Recommended Reading

R1. Steve Heath, Embedded Systems Design, Second Edition-2003, Newnes,

R2. David E.Simon, An Embedded Software Primer, Pearson Education Asia, Twelfth  Indian Reprint 2005.

R3. Wayne Wolf, Computers as Components; Principles of Embedded Computing System Design – Harcourt India, Morgan Kaufmann; 2 edition (8 July 2008).

R4. Frank Vahid and Tony Givargis, Embedded Systems Design – A unified Hardware /Software Introduction, John Wiley & Sons  2002.

Evaluation Pattern

CIA - 50 marks

ESE - 50 marks

MTVL151 - CMOS DIGITAL IC DESIGN LABORATORY (2024 Batch)

Total Teaching Hours for Semester:30
No of Lecture Hours/Week:2
Max Marks:50
Credits:2

Course Objectives/Course Description

 

To familiarize the students about basic CMOS IC design as well to provide hands on experiences on CMOS digital IC design

Learning Outcome

CO1: To familiarize the students about basic CMOS IC design as well to provide hands on experiences on CMOS digital IC design

Unit-1
Teaching Hours:30
Experiment List
 
  1. Characterization of NMOS and PMOS transistors for analog figure of merits
  2. Obtain VTC curve and threshold voltage of inverter for a specific parameter, verify with the value of threshold voltage obtained using formula
  3. Design NAND and NOR gate perform all the analysis
  4. Design XOR gate by using NAND and NOR gate. Perform transient analysis
  5. Design 1-bit half adder and verify the circuit using transient analysis
  6. Design Full adder and verify the circuit using transient analysis
  7. Design CMOS transmission gate and perform all the analysis to verify its characteristics
  8. Design NOR gate using Domino logic CMOS inverter and verify its characteristics.
  9. Design a MOS based SRAM cell and verify its characteristics
Text Books And Reference Books:

T1. Jan M. Rabaey, Anantha P. Chandrakasan and BorivojeNikolić, Digital Integrated Circuits: A Design Perspective, Second Edition, Prentice Hall India, 2003.

 T2. Sung-Mo Kang and Yusuf Leblebici, CMOS Digital Integrated Circuits - Analysis and Design, Third Edition, Tata McGraw-Hill, 2003.

T3. Neil H. E. Weste and David Money Harris, CMOS VLSI Design: A Circuits and Systems Perspective, Fourth Edition, Addison Wesley, 2010.

T4. Ken Martin, “Digital Integrated Circuit Design”, Oxford University Press, 2011.

Essential Reading / Recommended Reading

R1. Ming-BO Lin, “Introduction to VLSI Systems: A Logic, Circuit and System Perspective”, CRC Press, 2011

R2. Jan M. Rabaey, Anantha Chandrakasan, Borivoje Nikolic, “Digital Integrated Circuits – A Design Perspective”, 2nd Edition, PHI.

Evaluation Pattern

ESE - 50 marks

MTVL152 - SEMICONDUCTOR DEVICE THEORY AND MODELING LABORATORY (2024 Batch)

Total Teaching Hours for Semester:30
No of Lecture Hours/Week:2
Max Marks:50
Credits:2

Course Objectives/Course Description

 

To provide the students a basic knowledge as well as hands on experiences on device and circuit level modeling on primitive semiconductor devices such as diode, transistor, MOSFET, and some basic compound semiconductor devices.

Learning Outcome

CO1: Apply the concepts of device and circuit level modeling on primitive semiconductor devices such as diode, transistor, MOSFET,

CO2: Demonstrate working skills both as an individual and as a group member

CO3: Explain the working principles of semiconductor devices and model them

Unit-1
Teaching Hours:30
List of Experiments
 
  1. IV Characteristics of a Diode and BJT using MATLAB
  2. IV Characteristics of a MOSFET using MATLAB
  3. Analyzing Short Channel Effect of a MOSFET using MATLAB
  4. Band structure analysis of Compound Semiconductor using MATLAB
  5. Leakage Current Conduction mechanism of a MOSFET using MATLAB
  6. DC and Transient analysis of Resistance and Capacitance using SPICE
  7. DC and Transient analysis of Diode and BJT using SPICE
  8. Level1 Model of MOSFET using SPICE
  9. Level2 and Level 3 MOSFET modelling using SPICE
Text Books And Reference Books:

T1.Donald A. Neamen, “Semiconductor Physics and devices”, 4 McGraw Hill, 2017 th Edition, Tata . 

T2. Taur and Ning, “Fundamental of Modern VLSI Devices”, 2 nd Edition, Cambridge Press, 2016. 

T3. Balbir Kumar, Shail B. Jain, “Electronic Devices and Circuits”, PHI Publication, 2013.

Essential Reading / Recommended Reading

R1.Ben G. Streetman & S. Banerjee, “Solid state electronic devices”, 12 th Edition, Prentice Hall, 2010. 

 

R2.A. G. Milnes, “Semiconductor Devices and Integrated Electronics”, Springer, 2012. 3 Jan M.Rabaey” Digital Integrated Circuits: A design perspective”, Pearson, 2016.

Evaluation Pattern

ESE - 50 marks

MTAC221 - VALUE EDUCATION (2024 Batch)

Total Teaching Hours for Semester:30
No of Lecture Hours/Week:2
Max Marks:50
Credits:2

Course Objectives/Course Description

 

1.  Understand value of education and self- development

2.  Imbibe good values in students

3.  Let the should know about the importance of character

Learning Outcome

CO1: Knowledge of self-development

CO2: Learn the importance of Human values

CO3: Developing the overall personality

Unit-1
Teaching Hours:4
Content
 
  • Values and sell-development —Social values and individual attitudes. Work ethics, Indian vision of humanism.
  • Moral and non- moral valuation. Standards and principles.
  • Value judgements               
Unit-2
Teaching Hours:6
content
 

•Importance of cultivation of values.

•Sense of duty. Devotion, Self-reliance. Confidence, Concentration. Truthfulness, Cleanliness.

•Honesty, Humanity. Power of faith, National Unity.

•Patriotism.Love for nature ,Discipline

 

Unit-3
Teaching Hours:6
content
 

•Personality and Behavior Development - Soul and Scientific attitude. Positive Thinking. Integrity and discipline.

•Punctuality, Love and Kindness.

•Avoid fault Thinking.

•Free from anger, Dignity of labour.

•Universal brotherhood and religious tolerance.

•True friendship.

•Happiness Vs suffering, love for truth.

•Aware of self-destructive habits.

•Association and Cooperation.

•Doing best for saving nature

 

Unit-4
Teaching Hours:6
content
 

•Character and Competence —Holy books vs Blind faith.

•Self-management and Good health.

•Science of reincarnation.

•Equality, Nonviolence ,Humility, Role of Women.

•All religions and same message.

•Mind your Mind, Self-control.

•Honesty, Studyingeffectively

 

Text Books And Reference Books:

               

1 Chakroborty, S.K. "Values and Ethics for organizations Theory and practice", Oxford University Press, New Delhi

Essential Reading / Recommended Reading

                                   

Evaluation Pattern

           Assessment is based on the performance of the student throughout the semester. 

Assessment of each paper

  • Continuous Internal Assessment (CIA) for Theory papers: 50% (50 marks out 

of 100 marks)

  • End Semester Examination(ESE) : 50% (50 marks out of 100 marks)

Components of the CIA 

CIA I:   Mid Semester Examination (Theory): 25 marks

CIA II:  Assignments : 10 marks 

CIA III: Quizzes/Seminar/Case Studies/Project Work   : 10 marks

Attendance: 05 marks

Total: 50 marks

 

MTAC222 - PEDAGOGY STUDIES (2024 Batch)

Total Teaching Hours for Semester:30
No of Lecture Hours/Week:2
Max Marks:0
Credits:0

Course Objectives/Course Description

 

Students will be able to

 Review existing evidence on the review topic to inform programme design and policy making undertaken by the DfID, other agencies and researchers.

Identify critical evidence gaps to guide the development.

Learning Outcome

CO1: To review existing evidence on the review topic to inform programme design and policy making undertaken by the DfID, other agencies and researchers

Unit-1
Teaching Hours:4
Introduction and Methodology
 

 

Introduction and Methodology: ∙ Aims and rationale, Policy background, Conceptual framework and terminology ∙ Theories of learning, Curriculum, Teacher education. ∙ Conceptual framework, Research questions. ∙ Overview of methodology and Searching.

Unit-2
Teaching Hours:4
Thematic overview
 

 

Thematic overview: Pedagogical practices are being used by teachers in formal and informal classrooms in developing countries. ∙ Curriculum, Teacher education.

Unit-3
Teaching Hours:4
Evidence on the effectiveness of pedagogical practices
 

 

Evidence on the effectiveness of pedagogical practices ∙ Methodology for the in depth stage: quality assessment of included studies. ∙ How can teacher education (curriculum and practicum) and the school curriculum and guidance materials best support effective pedagogy? ∙ Theory of change. ∙ Strength and nature of the body of evidence for effective pedagogical practices. ∙ Pedagogic theory and pedagogical approaches. ∙ Teachers’ attitudes and beliefs and Pedagogic strategies.

Unit-4
Teaching Hours:4
Professional development
 

 

Professional development: alignment with classroom practices and follow-up support ∙ Peer support ∙Support from the head teacher and the community. ∙ Curriculum and assessment ∙ Barriers to learning: limited resources and large class sizes

   
Unit-5
Teaching Hours:4
Research gaps and future directions
 

 

Research gaps and future directions ∙ Research design ∙ Contexts ∙ Pedagogy ∙ Teacher education ∙ Curriculum and assessment ∙ Dissemination and research impact.

Text Books And Reference Books:

1.Ackers J, Hardman F (2001) Classroom interaction in Kenyan primary schools, Compare, 31 (2): 245-261

Essential Reading / Recommended Reading

 

1.      Agrawal M (2004) Curricular reform in schools: The importance of evaluation, Journal of Curriculum Studies, 36 (3): 361-379.

2.      Akyeampong K (2003) Teacher training in Ghana - does it count? Multi-site teacher education research project (MUSTER) country report 1. London: DFID.

3.      Akyeampong K, Lussier K, Pryor J, Westbrook J (2013) Improving teaching and learning of basic maths and reading in Africa: Does teacher preparation count? International Journal Educational Development, 33 (3): 272–282.

4.      Alexander RJ (2001) Culture and pedagogy: International comparisons in primary education. Oxford and Boston: Blackwell.

5.      Chavan M (2003) Read India: A mass scale, rapid, ‘l

 

  1. www.pratham.org/images/resource%20working%20paper%202.pdf.

earning to read’ campaign.

Additional information

 

  1. www.pratham.org/images/resource%20working%20paper%202.pdf.
Evaluation Pattern

NA

MTAC223 - PERSONALITY DEVELOPMENT THROUGH LIFE ENLIGHTENMENT SKILLS (2024 Batch)

Total Teaching Hours for Semester:24
No of Lecture Hours/Week:2
Max Marks:0
Credits:0

Course Objectives/Course Description

 

1. To learn to achieve the highest goal happily

2. To become a person with stable mind, pleasing personality and determination

3. To awaken wisdom in students 

Learning Outcome

CO1: To understand the importance of stable mind, pleasing personality and determination

Unit-1
Teaching Hours:8
Unit-1
 

Neetisatakam-Holistic development of personality · Verses- 19,20,21,22 (wisdom) · Verses- 29,31,32 (pride & heroism) · Verses- 26,28,63,65 (virtue) · Verses- 52,53,59 (dont’s) · Verses- 71,73,75,78 (do’s) 

 

Unit-2
Teaching Hours:8
Unit-2
 

 

· Approach to day to day work and duties. · Shrimad BhagwadGeeta: Chapter 2-Verses 41, 47,48, · Chapter 3-Verses 13, 21, 27, 35, Chapter 6-Verses 5,13,17, 23, 35, · Chapter 18-Verses 45, 46, 48.

 
Unit-3
Teaching Hours:8
unit 3
 

Statements of basic knowledge. · Shrimad BhagwadGeeta: Chapter2-Verses 56, 62, 68 · Chapter 12 -Verses 13, 14, 15, 16,17, 18 · Personality of Role model. Shrimad BhagwadGeeta: Chapter2-Verses 17, Chapter 3-Verses 36,37,42, · Chapter 4-Verses 18, 38,39 · Chapter18 – Verses 37,38,63 

Text Books And Reference Books:

 

1. “Srimad Bhagavad Gita” by Swami SwarupanandaAdvaita Ashram (Publication Department), Kolkata

2. Bhartrihari’s Three Satakam (Niti-sringar-vairagya) by P.Gopinath, Rashtriya Sanskrit Sansthanam, New Delhi. 

Essential Reading / Recommended Reading

 

1. “Srimad Bhagavad Gita” by Swami SwarupanandaAdvaita Ashram (Publication Department), Kolkata

2. Bhartrihari’s Three Satakam (Niti-sringar-vairagya) by P.Gopinath, Rashtriya Sanskrit Sansthanam, New Delhi. 

Evaluation Pattern

Mandatory learning course

MTVL231 - CAD ALGORITHMS FOR VLSI PHYSICAL DESIGN (2024 Batch)

Total Teaching Hours for Semester:45
No of Lecture Hours/Week:3
Max Marks:100
Credits:3

Course Objectives/Course Description

 

To introduce the technology, Subsystem design concepts and testing of Very Large Scale Integrated Circuits.

Learning Outcome

CO1: Understand the basics of CMOS circuits and CMOS process technology

CO2: Identify the CMOS inverters and logic gates

CO3: Strategy for estimating the parameter from the characteristics

CO4: Design VLSI subsystems

CO5: Test the CMOS circuits

Unit-1
Teaching Hours:9
VLSIdesign automation tools
 

VLSIdesign automation tools- algorithms and system design.  Structural and logic  design.  Transistor  level design. Layout design.  Verification  methods.  Design management tools.

Unit-2
Teaching Hours:9
Design algorithms
 

Layout compaction, placement and routing. Design   rules, symbolic layout. Applications of   compaction. Formulation methods.  Algorithms for constrained graph compaction.  Circuit   representation.  Wire  length estimation.   Placement algorithms. Partitioning algorithms.

Unit-3
Teaching Hours:9
Floor planning and routing
 

Floor planning and routing- floor planning concepts. Shape functions and floor   planning sizing.   Local routing. Area routing.  Channel routing,  global routing and its algorithms.

Unit-4
Teaching Hours:9
Simulation and logic synthesis
 

Simulation and logic synthesis-  gate   level  and   switch  level   modeling   and   simulation. Introduction to combinational logic synthesis. ROBDD  principles, implementation,  construction and manipulation.  Two level logic synthesis.

Unit-5
Teaching Hours:9
High-level synthesis
 

High-level synthesis-    hardware    model    for  high    level    synthesis.    Internal representation  of input algorithms.  Allocation, assignment  and scheduling.  Scheduling algorithms. Aspects of assignment.   High level transformations

Text Books And Reference Books:

 

T1. S.H.  Gerez, “Algorithms for VLSI Design Automation”,  John Wiley ,1998.
T2. N.A.Sherwani ,  “Algorithms for VLSI Physical Design Automation”, (3/e),  Kluwer,1999.

Essential Reading / Recommended Reading

R1. S.M. Sait ,  H. Youssef, “VLSI Physical Design Automation”,  World scientific, 1999.

R2. M.Sarrafzadeh, “Introduction to VLSI  Physical  Design”,  McGraw Hill (IE), 1996

Evaluation Pattern

CIA - 50 marks

ESE - 50 marks

MTVL232 - LOW POWER SYSTEM DESIGN (2024 Batch)

Total Teaching Hours for Semester:45
No of Lecture Hours/Week:3
Max Marks:100
Credits:3

Course Objectives/Course Description

 

•This course addresses a profound analysis on the development of the CMOS & BiCMOS digital circuits for a low voltage low power environment. 

•To study the concepts of device behavior and modelling.

•To study the concepts of low voltage, low power logic circuits.

 

Learning Outcome

CO1: Understand the need for low power in VLSI

CO2: Explain the power dissipation types in CMOS

CO3: Analyse the power dissipation factor in VLSI circuits

CO4: Describe the probabilistic techniques of power dissipation in VLSI circuits

CO5: Discuss the low power SRAM architecture

Unit-1
Teaching Hours:9
POWER DISSIPATION IN CMOS CIRCUITS
 

Hierarchy of limits of power – Sources of power consumption – Physics of power dissipation in CMOS FET devices – Basic principle of low power design.

Unit-2
Teaching Hours:9
POWER OPTIMIZATION
 

Logic level power optimization – Circuit level low power design – Circuit techniques for reducing Power consumption in adders and multipliers.

Unit-3
Teaching Hours:9
DESIGN OF LOW POWER CIRCUITS
 

Computer arithmetic techniques for low power system – reducing power consumption in memories – low power clock, Inter connect and layout design – Advanced techniques –Special techniques.

Unit-4
Teaching Hours:9
POWER ESTIMATION
 

Power Estimation technique – logic power estimation – Simulation power analysis –Monte-Carlo power Estimation, Advanced sampling Techniques, Vector Compaction – Probabilistic power analysis–combinational circuits, Real-Delay gate power Estimation, Sequential Circuits.

Unit-5
Teaching Hours:9
SYNTHESIS AND SOFTWARE DESIGN
 

Synthesis for low power – Behavioral level transforms, logic level optimization, Circuit level – software design for low power- sources of software power dissipation, software power estimation, software power optimizations, Automated low power code generation.

Text Books And Reference Books:

1. Kaushik Roy and S.C.Prasad, “Low power CMOS VLSI circuit design”, Wiley, 2000.

2. DimitriosSoudris, Christians Pignet, Costas Goutis, “Designing CMOS Circuits for Low Power”, Kluwer, 2002.

 

Essential Reading / Recommended Reading

1. J.B.Kulo and J.H Lou, “Low voltage CMOS VLSI Circuits”, Wiley 1999.

2. A.P.Chandrasekaran and R.W.Broadersen, “Low power digital CMOS design”, Kluwer,1995

3. Gary Yeap, “Practical low power digital VLSI design”, Kluwer, 1998

4. Abdelatif Belaouar, Mohamed.I.Elmasry, “Low power digital VLSI design”, Kluwer, 1995

5. James B.Kulo, Shih-Chia Lin, “Low voltage SOI CMOS VLSI devices and Circuits”, JohnWiley and sons, inc. 2001.

 

Evaluation Pattern

as per university norms

MTVL243E03 - ADVANCED COMPUTER ARCHITECTURE (2024 Batch)

Total Teaching Hours for Semester:45
No of Lecture Hours/Week:3
Max Marks:100
Credits:3

Course Objectives/Course Description

 
  • Study of parallel processing and program flow control in a processor.
  • Study of multiprocessor and multicomputer.
  • To be acquainted with memory organization of processors.

 

Learning Outcome

CO1: Apply new data-path algorithms to implement a processor

CO2: Measure the fault tolerance and reliability of a processor

CO3: Explain multiprocessor architecture along with the challenges associated in their design

Unit-1
Teaching Hours:9
PARALLEL COMPUTER MODELS
 

Thestate of computing, Classification of parallel computers, Multiprocessors and multicomputer, Multifactor and SIMD computers. Program and network properties: Conditions of parallelism, Data and resource Dependences, Hardware and software parallelism, Program partitioning and scheduling, Grain Size and latency, Program flow mechanisms, Control flow versus data flow, Data flow Architecture, Demand driven mechanisms, Comparisons of flow mechanisms.

Unit-2
Teaching Hours:9
SYSTEM INTERCONNECT ARCHITECTURES
 

Network properties and routing, Static interconnection Networks, Dynamic interconnection Networks, Multiprocessor system Interconnects, Hierarchical bus systems, Crossbar switch and multiport memory, Multistage and combining network.

Unit-3
Teaching Hours:9
CACHE MECHANISM
 

Introduction to cache memory, memory hierarchy and cache memory, Cache architecture and cache policies. CONCEPT OF FLUSHING AND CLEANING CACHE: Flushing and Cleaning ARM cache core.CONCEPT OF CACHE LOCKDOWN: Locking Code and Data in Cache. Cache and write buffer.

Unit-4
Teaching Hours:9
PIPELINING
 

Linear pipeline processor, nonlinear pipeline processor, Instruction pipeline Design, Mechanisms for instruction pipelining, Dynamic instruction scheduling, Branch Handling techniques, branch prediction, Arithmetic Pipeline Design, Computer arithmetic principles, Static Arithmetic pipeline, Multifunctional arithmetic pipelines Memory Hierarchy Design: Cache basics & cache performance, reducing miss rate and miss penalty, multilevel cache hierarchies, main memory organizations, design of memory hierarchies.

Unit-5
Teaching Hours:9
MULTIPROCESSOR ARCHITECTURES
 

Symmetric shared memory architectures, distributed shared memory architectures, models of memory consistency, cache coherence protocols (MSI, MESI, and MOESI), scalable cache coherence, overview of directory based approaches, design challenges of directory protocols, memory based directory protocols, cache based directory protocols, protocol design tradeoffs, and synchronization. Scalable point –point interfaces: Alpha364 and HT protocols, high performance signalling layer. Enterprise Memory subsystem Architecture: Enterprise RAS Feature set: Machine checks, hot add/remove, domain partitioning, memory mirroring/migration, patrol scrubbing, fault tolerant system.

Text Books And Reference Books:

T1. Advanced Computer Architecture, by Kai Hwang Mc Graw Hill. 

T2. Introduction to Parallel Computing, 2nd Edition, Pearson Education by Ananth Grama, Anshul Gupta, George Karypis, Vipin Kumar.

Essential Reading / Recommended Reading

R1. Computer Architecture – A quantitative approach By J.L Hennessy and D.A.Patterson (Morgan)

R2. Computer Architecture and Parallel Processing, by K.Hwang and F.A. Briggs. Mc Graw Hill, International

Evaluation Pattern

CIA - 50 marks

ESE - 50 marks

MTVL244E01 - TESTING OF VLSI CIRCUITS (DFT) (2024 Batch)

Total Teaching Hours for Semester:45
No of Lecture Hours/Week:3
Max Marks:100
Credits:3

Course Objectives/Course Description

 

To introduce the technology, Subsystem design concepts and testing of Very Large Scale Integrated Circuits.

Learning Outcome

CO1: Understand the basics of CMOS circuits, testing and fault modelling

CO2: Identify the CMOS circuits techniques for test generation

CO3: Describe the characteristics for Design For Testability

CO4: Design and analyze self test and test algorithms for CMOS circuits

CO5: Test and verify the CMOS circuits using fault diagnosis approach

Unit-1
Teaching Hours:9
BASICS OF TESTING AND FAULT MODELING
 

Introduction - Need for testing - VLSI Testing Process and Test Equipment - Types of testing - ATE – ADVANTEST model T6682-Block Diagram and Specification– Electrical parametric testing – Single Stuck at faults.

Unit-2
Teaching Hours:9
TEST GENERATION
 

Faults in Digital circuits-failures and faults. Algorithms and Representations - Redundancy Identification (RID) - Test generation for combinational logic circuits-combinational ATPG-Boolean Difference Method-D-Algorithm-PODEM - FAN Algorithm.

Unit-3
Teaching Hours:9
DESIGN FOR TESTABILITY
 

Design for Testability – Ad-hoc design – generic scan based design – classical scan based design – system level DFT approaches.

Unit-4
Teaching Hours:9
SELF-TEST AND TEST ALGORITHMS
 

Built-In self-Test – Test pattern generation for BIST – Circular BIST – BIST Architectures – Testable Memory Design – Test Algorithms – Test generation for Embedded RAMs.

Unit-5
Teaching Hours:9
FAULT DIAGNOSIS
 

Logical Level Diagnosis – Diagnosis by UUT reduction – Fault Diagnosis for Combinational Circuits – Self-checking design – System Level Diagnosis.

Text Books And Reference Books:

T1. M.Abramovici, M.A.Breuer and A.D. Friedman, “Digital systems Testing and Testable Design”, Jaico Publishing House, 2002.

T2. M.L.Bushnell and V.D.Agrawal, “Essentials of Electronic Testing for Digital, Memory and Mixed-Signal VLSI Circuits”, Kluwer Academic Publishers, 2002.

Essential Reading / Recommended Reading

R1. P.K. Lala, “Digital Circuit Testing and Testability”, Academic Press, 2002.

R2. A.L.Crouch, “Design Test for Digital IC’s and Embedded Core Systems”, Prentice Hall International, 2002.

R3. Neil H.E. Weste, “Principles of CMOS VLSI Design A Systems Perspective” Second Edition, 2000.

Evaluation Pattern

CIA - 50 marks

ESE - 50 marks

MTVL251 - VLSI DESIGN AND VERIFICATION LABORATORY (2024 Batch)

Total Teaching Hours for Semester:45
No of Lecture Hours/Week:3
Max Marks:100
Credits:3

Course Objectives/Course Description

 

 Starting from high level design entry in the form VHDL/Verilog codes, the students will be carrying out complete hardware level FPGA validation of important digital algorithms. 

Learning Outcome

CO1: To carry out complete hardware level FPGA validation of important digital algorithms.

Unit-1
Teaching Hours:60
EXPERIMENT LIST
 
  1. Design Entry Using VHDL
  2. Verilog examples for Digital circuit descriptions using HDL languages sequential, concurrent statements and structural description.
  3. Understanding Synthesis principles.
  4. Back annotation.
  5. Test vector generation and timing analysis of sequential and combinational logic design realized using HDL languages.
  6. FPGA real time programming and I/O interfacing.
  7. Interfacing with Memory modules in FPGA Boards.
  8. Verification of design functionality implemented in FPGA by capturing the signal in DSO.
  9. Real time application development.
Text Books And Reference Books:

Lab based course. Manuals shall be provided 

Essential Reading / Recommended Reading

Lab based course. Manuals shall be provided 

Evaluation Pattern

Theory - 65

Practical  - 35

 

Theory CIA : 30 Marks

Theory ESE : 30 Marks

Attendance : 5 Marks

 

MTVL252 - FPGA ARCHITECTURE AND APPLICATION LABORATORY (2024 Batch)

Total Teaching Hours for Semester:30
No of Lecture Hours/Week:2
Max Marks:50
Credits:2

Course Objectives/Course Description

 

To provide the students a basic knowledge as well as hands on experiences on FPGA devices  & interfacing with VHDL/Verilog languages

Learning Outcome

CO1: Apply basic knowledge as well as hands on experiences on FPGA devices & interfacing with VHDL/Verilog languages

Unit-1
Teaching Hours:30
LIST OF EXPERIMENTS
 
  1. Design Entry and Simulation of Combinational Circuits
  2. Place and Route and Post Place & Route Simulation
  3. Design and FPGA Implementation of Combinational Circuits
  4. Design and FPGA Implementation of Sequential Circuits
  5. Analysis of Area, Power and Delay for Sequential Circuits
  6. Invoke PLL to generate Real Time Clock
  7. Memories: ROMs and BRAMs Internal to the FPGA
  8. Memories: External SPI Flash and DDR2
  9. Interfacing FPGA board with AC’97 Codec
  10. PS2 Keyboard and UART
  11. Interfacing FPGA board with Host Computer via USB
  12. Video Interfaces: HDMI and DVI
  13. PicoBlaze – an embedded microcontroller
  14. Single Cycle Computer
Text Books And Reference Books:

T1.M. Morris Mano and Charles Kime, Logic and Computer Design Fundamentals, Pearson Prentice Hall, 4th Edition.

T2.Verilog HDL: Samir Palnitkar,2 edition,Pearson Education,2003.

T3.P.P. Chu, RTL Hardware Design Using VHDL: Coding for Efficiency, Portability and Scalability, Wiley-Interscience, 2006.

T4.Peter.J.Ashenden, Digital Design : An Embedded Systems Approach  Using      Verilog, Elesvier 2010

Essential Reading / Recommended Reading

R1.Pong P. Chu, FPGA Prototyping by VHDL Examples: Xilinx Spartan-3 Version, Wiley 2008.

R2.Ken Chapman, PicoBlaze 8-Bit Microcontroller for Virtex-E and Spartan-II/IIE Devices. Xilinx

R3. HDMI and DVI pointers: --HDMI resource center; http://www.hdmi.org/learningcenter/--Wikipedia HDMI introduction; http://en.wikipedia.org/wiki/HDMI--HDMI specification document Version 1.3; see file included in this lab archive; --HDMI Hider: TI TMDS141 (datasheet of the chip on the Atlys board); 

R4.  Tony Storey and Scott Larson, AC’97 Codec Hardware Driver Example. 

https://forum.digikey.com/t/ac97-codec-hardware-driver-example/13194

R5.  Johannes Hausensteiner, SPI Controller in VHDL. 

http://opencores.org/project,spiflashcontroller

R6. Datasheet Numonyx N25Q12 Serial Flash memory. http://www.alldatasheet.com/datasheetpdf/pdf/353314/NUMONYX/N25Q128.html

Evaluation Pattern

ESE - 50 marks

MTVL341E16 - IOT SYSTEM DESIGN (2023 Batch)

Total Teaching Hours for Semester:45
No of Lecture Hours/Week:3
Max Marks:100
Credits:3

Course Objectives/Course Description

 

To enable the students to understand and interpret different concepts in IoT and help them in building new applications

Learning Outcome

CO1: To understand the fundamentals of IoT

CO2: To summarise the need for database management in IoT

CO3: To learn about the classifications on IoT protocols

CO4: To summarise about different IoT Platforms

CO5: To interpret about data analysis possibilities in IoT Domain

Unit-1
Teaching Hours:9
IoT/WSN Introduction
 

Review of computer communication concepts (OSI layers, components, packet communication, Networks, TCP-IP, subnetting, IPV4 addressing and challenges). IPV6 addressing. IoT architecture reference layer, Characteristics IoT sensor nodes, Edge computer, Open SourceHardwares

Unit-1
Teaching Hours:9
IoT/WSN Introduction
 

Review of computer communication concepts (OSI layers, components, packet communication, Networks, TCP-IP, subnetting, IPV4 addressing and challenges). IPV6 addressing. IoT architecture reference layer, Characteristics IoT sensor nodes, Edge computer, Open SourceHardwares

Unit-2
Teaching Hours:9
IoT Database Management
 

IoT Technology- Devices and gateways, Local and wide area networking, Data management, Business processes in IoT, M2M and IoT Analytics, Knowledge Management, Real-World Design Constraints- Introduction, Technical Design constraints-hardware is popular again, Data representation and visualization, Interaction and remote control.

Unit-2
Teaching Hours:9
IoT Database Management
 

IoT Technology- Devices and gateways, Local and wide area networking, Data management, Business processes in IoT, M2M and IoT Analytics, Knowledge Management, Real-World Design Constraints- Introduction, Technical Design constraints-hardware is popular again, Data representation and visualization, Interaction and remote control.

Unit-3
Teaching Hours:9
IoT Protocols
 

 

 

IoT Access Technologies: Topology and Security of IEEE 802.15.4, 802.15.4g, 802.15.4e, 1901.2a, 802.11ah and LoRaWAN, Zigbee protocol, Network Layer: IP versions, Constrained Nodes and Constrained Networks, Optimizing IP for IoT: From 6LoWPAN to 6Lo, Routing over Low Power and Lossy Networks, Application Transport Methods

 

 

Unit-3
Teaching Hours:9
IoT Protocols
 

 

 

IoT Access Technologies: Topology and Security of IEEE 802.15.4, 802.15.4g, 802.15.4e, 1901.2a, 802.11ah and LoRaWAN, Zigbee protocol, Network Layer: IP versions, Constrained Nodes and Constrained Networks, Optimizing IP for IoT: From 6LoWPAN to 6Lo, Routing over Low Power and Lossy Networks, Application Transport Methods

 

 

Unit-4
Teaching Hours:9
IoT Platforms
 

Virtualization concepts and Cloud Architecture, Cloud computing, benefits Cloud services -- SaaS, PaaS, IaaS, Cloud providers & offerings, Study of IOT Cloud platforms, ThingSpeak API and MQTT,  Interfacing ESP8266 with Web services

Unit-4
Teaching Hours:9
IoT Platforms
 

Virtualization concepts and Cloud Architecture, Cloud computing, benefits Cloud services -- SaaS, PaaS, IaaS, Cloud providers & offerings, Study of IOT Cloud platforms, ThingSpeak API and MQTT,  Interfacing ESP8266 with Web services

Unit-5
Teaching Hours:9
IoT based Data Analysis
 

Structured Vs Unstructured Data and Data in Motion Vs Data in Rest, Role of Machine Learning-No SQL Databases, Hadoop Ecosystem, Apache Kafka, Apache Spark, Edge Streaming Analytics and Network Analytics, Xively Cloud for IoT, Python Web Application Framework, Django, AWS for IoT, System Management with NETCONF-YANG, Kibana, Faulttolerant data processing on devices

Unit-5
Teaching Hours:9
IoT based Data Analysis
 

Structured Vs Unstructured Data and Data in Motion Vs Data in Rest, Role of Machine Learning-No SQL Databases, Hadoop Ecosystem, Apache Kafka, Apache Spark, Edge Streaming Analytics and Network Analytics, Xively Cloud for IoT, Python Web Application Framework, Django, AWS for IoT, System Management with NETCONF-YANG, Kibana, Faulttolerant data processing on devices

Text Books And Reference Books:

1.Jan Holler, Vlasios Tsiatsis, Catherine Mulligan, Stamatis Karnouskos, Stefan Avesand,

David Boyle, “From Machine to Machine to Internet of Things”, Elsevier Publications, 2014

 2. Vijay Madisetti , Arshdeep Bahga, Adrian McEwen (Author), Hakim Cassimally

“Internet of Things A Hands-on-Approach” Arshdeep Bahga & Vijay Madisetti, 2014

Essential Reading / Recommended Reading

R1. Peter Waher, “Learning Internet of Things”, PACKT publishing

R2. Bernd Scholz-Reiter, Florian Michahelles, “Architecting the Internet of Things”, ISBN 978-3-642-19156-5 e-ISBN 978-3-642-19157-2, Springer

R3. Daniel Minoli, “Building the Internet of Things with IPv6 and MIPv6: The Evolving World of M2M Communications”, ISBN: 978-1-118-47347-4, Willy Publications

Evaluation Pattern

CIA-50

ESE-50

MTVL342E01 - COMPRESSION AND ENCRYPTION TECHNIQUES (2023 Batch)

Total Teaching Hours for Semester:45
No of Lecture Hours/Week:3
Max Marks:100
Credits:3

Course Objectives/Course Description

 

This course aims at making the students get an understanding of the compression techniques available for multimedia applications and also get an understanding of the encryption that can be implemented along with the compression.

Learning Outcome

CO-1: Explain the taxonomy of multimedia compression techniques

CO-2: Explain the concept of text compression through the coding techniques

CO-3: Describe the motion estimation techniques used in video compression

CO-4: Explain the concept of encryption with the models employed

CO-5: Explain the symmetric ciphers and their techniques & standards

Unit-1
Teaching Hours:9
INTRODUCTION TO COMPRESSION
 

Special features of Multimedia – Graphics and Image Data Representations – Fundamental Concepts in Video and Digital Audio – Storage requirements for multimedia applications -Need for Compression - Taxonomy of compression techniques – Overview of source coding

Unit-1
Teaching Hours:9
INTRODUCTION TO COMPRESSION
 

Special features of Multimedia – Graphics and Image Data Representations – Fundamental Concepts in Video and Digital Audio – Storage requirements for multimedia applications -Need for Compression - Taxonomy of compression techniques – Overview of source coding

Unit-1
Teaching Hours:9
INTRODUCTION TO COMPRESSION
 

Special features of Multimedia – Graphics and Image Data Representations – Fundamental Concepts in Video and Digital Audio – Storage requirements for multimedia applications -Need for Compression - Taxonomy of compression techniques – Overview of source coding

Unit-1
Teaching Hours:9
INTRODUCTION TO COMPRESSION
 

Special features of Multimedia – Graphics and Image Data Representations – Fundamental Concepts in Video and Digital Audio – Storage requirements for multimedia applications -Need for Compression - Taxonomy of compression techniques – Overview of source coding

Unit-2
Teaching Hours:9
TEXT COMPRESSION
 

Compaction techniques – Huffmann coding – Adaptive Huffmann Coding – Arithmatic coding – Shannon-Fano coding – Dictionary techniques – LZW family algorithms

Unit-2
Teaching Hours:9
TEXT COMPRESSION
 

Compaction techniques – Huffmann coding – Adaptive Huffmann Coding – Arithmatic coding – Shannon-Fano coding – Dictionary techniques – LZW family algorithms

Unit-2
Teaching Hours:9
TEXT COMPRESSION
 

Compaction techniques – Huffmann coding – Adaptive Huffmann Coding – Arithmatic coding – Shannon-Fano coding – Dictionary techniques – LZW family algorithms

Unit-2
Teaching Hours:9
TEXT COMPRESSION
 

Compaction techniques – Huffmann coding – Adaptive Huffmann Coding – Arithmatic coding – Shannon-Fano coding – Dictionary techniques – LZW family algorithms

Unit-3
Teaching Hours:9
VIDEO COMPRESSION
 

Video compression techniques and standards – MPEG Video Coding I: MPEG – 1 and 2 – MPEG Video Coding II: MPEG – 4 and 7 – Motion estimation and compensation techniques – H.261 Standard

Unit-3
Teaching Hours:9
VIDEO COMPRESSION
 

Video compression techniques and standards – MPEG Video Coding I: MPEG – 1 and 2 – MPEG Video Coding II: MPEG – 4 and 7 – Motion estimation and compensation techniques – H.261 Standard

Unit-3
Teaching Hours:9
VIDEO COMPRESSION
 

Video compression techniques and standards – MPEG Video Coding I: MPEG – 1 and 2 – MPEG Video Coding II: MPEG – 4 and 7 – Motion estimation and compensation techniques – H.261 Standard

Unit-3
Teaching Hours:9
VIDEO COMPRESSION
 

Video compression techniques and standards – MPEG Video Coding I: MPEG – 1 and 2 – MPEG Video Coding II: MPEG – 4 and 7 – Motion estimation and compensation techniques – H.261 Standard

Unit-4
Teaching Hours:9
INTRODUCTION TO ENCRYPTION
 

Introduction: Services, Mechanisms and Attacks, OSI security Architecture, Model for network Security; Classical Encryption Techniques:Symmetric Cipher Model, Substitution Techniques, Transposition Techniques, Rotor Machines, Stegnography;

Unit-4
Teaching Hours:9
INTRODUCTION TO ENCRYPTION
 

Introduction: Services, Mechanisms and Attacks, OSI security Architecture, Model for network Security; Classical Encryption Techniques:Symmetric Cipher Model, Substitution Techniques, Transposition Techniques, Rotor Machines, Stegnography;

Unit-4
Teaching Hours:9
INTRODUCTION TO ENCRYPTION
 

Introduction: Services, Mechanisms and Attacks, OSI security Architecture, Model for network Security; Classical Encryption Techniques:Symmetric Cipher Model, Substitution Techniques, Transposition Techniques, Rotor Machines, Stegnography;

Unit-4
Teaching Hours:9
INTRODUCTION TO ENCRYPTION
 

Introduction: Services, Mechanisms and Attacks, OSI security Architecture, Model for network Security; Classical Encryption Techniques:Symmetric Cipher Model, Substitution Techniques, Transposition Techniques, Rotor Machines, Stegnography;

Unit-5
Teaching Hours:9
CIPHERS
 

Block Ciphers and Data Encryption Standard: Simplified DES, Block Cipher Principles, Data Encryption Standard, Strength of DES, Differential and Linear Crypt Analysis, Block Cipher Design Principles, Block Cipher Modes of Operation

Unit-5
Teaching Hours:9
CIPHERS
 

Block Ciphers and Data Encryption Standard: Simplified DES, Block Cipher Principles, Data Encryption Standard, Strength of DES, Differential and Linear Crypt Analysis, Block Cipher Design Principles, Block Cipher Modes of Operation

Unit-5
Teaching Hours:9
CIPHERS
 

Block Ciphers and Data Encryption Standard: Simplified DES, Block Cipher Principles, Data Encryption Standard, Strength of DES, Differential and Linear Crypt Analysis, Block Cipher Design Principles, Block Cipher Modes of Operation

Unit-5
Teaching Hours:9
CIPHERS
 

Block Ciphers and Data Encryption Standard: Simplified DES, Block Cipher Principles, Data Encryption Standard, Strength of DES, Differential and Linear Crypt Analysis, Block Cipher Design Principles, Block Cipher Modes of Operation

Text Books And Reference Books:

NIL

Essential Reading / Recommended Reading

1. Khalid Sayood : Introduction to Data Compression, Morgan Kauffman Harcourt India, 2nd Edition, 2000

2. David Salomon : Data Compression – The Complete Reference, Springer Verlag New York Inc., 4th Edition, 2006

3. Yun Q.Shi, HuifangSun : Image and Video Compression for Multimedia Engineering -  Fundamentals, Algorithms & Standards, CRC press, 2008

4.Jan Vozer : Video Compression for Multimedia, AP Profes, NewYork, 1995.

5. William Stallings, “Cryptography and Network Security”, 6th. Ed, Prentice Hall of India, New Delhi ,2013

6. William Stallings, “Network Security Essentials”, 5thed. Prentice Hall of India, New Delhi

Evaluation Pattern

CIA-50

ESE-50

MTVL381 - INTERNSHIP (2023 Batch)

Total Teaching Hours for Semester:0
No of Lecture Hours/Week:8
Max Marks:50
Credits:2

Course Objectives/Course Description

 

This course aims to provide an opportunity to seek, acquire and explore an appropriate level of technical skills through industry exposure.

Expose technical students to the industrial environment, whichcan not be simulated in the classroom and hence creating
competent professionals for the industry.

Provide possible opportunities to learn, understand and sharpen
the real time technical / managerial skills required at the job.
 Exposure to the current technological developments relevant to the
subject area of training.
 Experience gained from the ‘Industrial Internship’ will be used in
classroom discussions.
 Create conditions conducive to quest for knowledge and its
applicability on the job.

Learning Outcome

CO1: Expose technical students to the industrial environment, which cannot be simulated in the classroom and hence creating competent professionals for the industry.

CO2: Provide possible opportunities to learn, understand and sharpen the real time technical / managerial skills required at the job.

CO3: Exposure to the current technological developments relevant to the subject area of training.

CO4: Experience gained from the Industrial Internship will be used in classroom discussions.

CO5: Create conditions conducive to quest for knowledge and its applicability on the job.

Unit-1
Teaching Hours:0
Syllabus not available as it is industry oriented
 

NA

Text Books And Reference Books:

 

Relevant literature and software tools for the chosen problem

 

Essential Reading / Recommended Reading

 

Relevant literature and software tools for the chosen problem

 

Evaluation Pattern

The assessment of Internship is only based on Continuous
Internal Assessment considering the criteria mentioned below.
There is no end semester examination.
Duration of Internship 20
Type of Industry 10
Student Presentation 10
Internship Report 10
Total 50

MTVL382 - DISSERTATION PHASE I (2023 Batch)

Total Teaching Hours for Semester:45
No of Lecture Hours/Week:3
Max Marks:100
Credits:3

Course Objectives/Course Description

 

 

 

The student is expected to carry out supervised research in this course. An intensive
literature in the chosen area, should result in sound knowledge in the area and result in the
identification of a suitable research problem, and its formulation and analysis. Study of
relevant supplementary literature, such mastering useful programming languages and
tools for the problem, are also expected at this stage of the project. The student is expected
to present three reports at different evaluation points duringthe semester, with clearly
defined achievements and plans for further steps.

 

Learning Outcome

CO1: Design engineering solutions to complex real world problems using research literature for societal applications through independent study. [L6] [PO1, PO2, PO3, PO4, PO6, PO12]

CO2: Use appropriate hardware and software depending on the nature of the project with an understanding of their limitations. [L3] [PO5]

Unit-1
Teaching Hours:0
Based on four domain ,Electronics component,Signal processing,VLSI design,RF and Microwave communication.
 

Relevant literature and software tools for the chosen problem

Text Books And Reference Books:

Relevant literature and software tools for the chosen problem

Essential Reading / Recommended Reading

Relevant literature and software tools for the chosen problem

Evaluation Pattern

 

v  Assessment of Project Work(Phase I)

 

§  Continuous Internal Assessment:100 Marks

 

¨      Presentation assessed by Panel Members

 

¨      Assessment by Guide

 

v  Assessment of Project Work(Phase II) and Dissertation

 

                                Continuous Internal Assessment:100 Marks

 

¨      Presentation assessed by Panel Members

 

¨      Assessment by Guide

 

 

 

§  End Semester Examination:100 Marks

 

¨      Viva Voce

 

¨      Demonstration

 

¨      Project Report

 

§  Dissertation (Exclusive assessment of Project Report): 100 Marks

 

¨      Internal Review : 50 Marks

 

¨      External review : 50 Marks

 

MTVL481 - DISSERTATION PHASE II (2023 Batch)

Total Teaching Hours for Semester:0
No of Lecture Hours/Week:4
Max Marks:100
Credits:3

Course Objectives/Course Description

 

 

The student is expected to carry out supervised research in this course. An intensive
literature in the chosen area, should result in sound knowledge in the area and result in the
identification of a suitable research problem, and its formulation and analysis. Study of
relevant supplementary literature, such mastering useful programming languages and
tools for the problem, are also expected at this stage of the project. The student is expected
to present three reports at different evaluation points duringthe semester, with clearly
defined achievements and plans for further steps.

 

Learning Outcome

CO-1: Demonstrate teamwork and leadership skills with professional ethics and prepare a project report in the prescribed format. [L3] [PO8, PO9, PO10]

CO-2: Understand the impact of the developed projects on environmental factors [L2] [PO6, PO7]

CO-3: Demonstrate teamwork and leadership skills with professional ethics and prepare a project report in the prescribed format. [L3] [PO8, PO9, PO10] 2.Understand the impact of the developed projects on environmental factors [L2] [PO6, PO7] 3.Demonstrate project management skills including handling the finances in doing projects for given real world societal problems [L3] [PO6, PO11] Demonstrate project management skills including handling the finances in doing projects for given real world societal problems [L3] [PO6, PO11]

Unit-1
Teaching Hours:0
Based on four domain ,Electronics component,Signal processing,VLSI design,RF and Microwave communication.
 

 

Relevant literature and software tools for the chosen problem

 

Text Books And Reference Books:

 

Relevant literature and software tools for the chosen problem

 

Essential Reading / Recommended Reading

 

Relevant literature and software tools for the chosen problem

 

Evaluation Pattern

v  Assessment of Project Work(Phase I)

 

§  Continuous Internal Assessment:100 Marks

 

¨      Presentation assessed by Panel Members

 

¨      Assessment by Guide

 

v  Assessment of Project Work(Phase II) and Dissertation

 

                                Continuous Internal Assessment:100 Marks

 

¨      Presentation assessed by Panel Members

 

¨      Assessment by Guide

 

 

 

§  End Semester Examination:100 Marks

 

¨      Viva Voce

 

¨      Demonstration

 

¨      Project Report

 

§  Dissertation (Exclusive assessment of Project Report): 100 Marks

 

¨      Internal Review : 50 Marks

 

¨      External review : 50 Marks